TES600鏄寳浜潚緲肩鎶鐨勪竴嬈懼熀浜?/span>FPGA涓?/span>DSP鍗忓悓澶勭悊鏋舵瀯鐨勯氱敤楂樻ц兘瀹炴椂淇″彿澶勭悊騫沖彴錛岃騫沖彴閲囩敤1鐗?/span>TI鐨?/span>KeyStone緋誨垪澶氭牳嫻偣/瀹氱偣DSP TMS320C6678浣滀負涓誨鐞嗗崟鍏冿紝閲囩敤1鐗?/span>Xilinx鐨?/span>Kintex-7緋誨垪FPGA XC7K325T浣滀負鍗忓鐞嗗崟鍏冿紝鍏鋒湁1涓?/span>FMC瀛愬崱鎺ュ彛錛屽叿鏈?/span>4璺?/span>SFP+涓囧厗鍏夌氦鎺ュ彛錛屽鐞嗚妭鐐逛箣闂撮氳繃楂橀熶覆琛屾葷嚎榪涜浜掕仈銆傝緋葷粺閫氳繃鎼厤涓嶅悓鐨?/span>FMC瀛愬崱錛屽彲騫挎硾搴旂敤浜庤蔣浠舵棤綰跨數銆侀浄杈句俊鍙峰鐞嗐佸熀甯︿俊鍙峰鐞嗐佹棤綰夸豢鐪熷鉤鍙般侀珮閫熷浘褰㈠浘鍍忓鐞嗙瓑搴旂敤鍦烘櫙銆?/span>
鎶鏈寚鏍?/span>
FPGA + 澶氭牳DSP鍗忓悓澶勭悊鏋舵瀯錛?/span>
鎺ュ彛鎬ц兘錛?/span>
1.1涓?/span>FMC錛?/span>HPC錛夋帴鍙ｏ紱
2.4璺?/span>SFP+鍏夌氦鎺ュ彛錛?/span>
3.2涓?/span>GbE鍗冨厗浠ュお緗戝彛錛?/span>
4.2璺瑙﹀彂杈撳叆淇″彿錛?/span>
澶勭悊鎬ц兘錛?/span>
1.DSP瀹氱偣榪愮畻錛?/span>40GMAC/Core*8=320GMAC錛?/span>
2.DSP嫻偣榪愮畻錛?/span>20GFLOPs/Core*8=160GFLOPs錛?/span>
瀛樺偍鎬ц兘錛?/span>
1.DSP澶勭悊鑺傜偣錛?/span>4GByte DDR3-1333 SDRAM錛?/span>
2.DSP澶勭悊鑺傜偣錛?/span>4GByte Nand Flash錛?/span>
3.FPGA澶勭悊鑺傜偣錛?/span>2GByte DDR3-1600 SDRAM錛?/span>
浜掕仈鎬ц兘錛?/span>
1.DSP涓?/span>FPGA錛?/span>SRIO x4@5Gbps/lane錛?/span>
2.FPGA涓?/span>FMC鎺ュ彛錛?/span>1璺?/span>GTX x8@10Gbps/lane錛?/span>
鐗╃悊涓庣數姘旂壒寰?/span>
1.鏉垮崱灝哄錛?/span>171 x 204mm
2.鏉垮崱渚涚數錛?/span>3A max@+12V錛埪?/span>5%錛?/span>
3.鏁ｇ儹鏂瑰紡錛氳嚜鐒墮鍐鋒暎鐑?/span>
鐜鐗瑰緛
1. 宸ヤ綔娓╁害錛?/span>-40擄~錒?/span>85擄C錛屽瓨鍌ㄦ俯搴︼細-55擄~錒?/span>125擄C錛?/span>
2.宸ヤ綔婀垮害錛?/span>5%~95%錛岄潪鍑濈粨
杞歡鏀寔
1.鍙夐泦鎴愭澘綰ц蔣浠跺紑鍙戝寘錛?/span>BSP錛夛細
2.DSP搴曞眰鎺ュ彛椹卞姩錛?/span>
3.FPGA搴曞眰鎺ュ彛椹卞姩錛?/span>
4.鏉跨駭浜掕仈鎺ュ彛椹卞姩錛?/span>
5.鍩轟簬SYS/BIOS鐨勫鏍稿鐞嗗簳灞傞┍鍔紱
6.鍙牴鎹鎴烽渶姹傛彁渚涘畾鍒跺寲綆楁硶涓庣郴緇熼泦鎴愶細
搴旂敤鑼冨洿
1.杞歡鏃犵嚎鐢碉紱
2.闆瘋揪淇″彿澶勭悊錛?/span>
3.楂橀熷浘褰㈠鐞嗭紱